Debug, Programming and Fixtures: Pin Headers on the Bench and the Line
August 31, 2026Views: 325
排针调试JTAG治具
The highest-volume “non-feature” port
MCU eval boards ship a header: 10P 1.27mm Cortex Debug, 20P 2.54mm JTAG, 3P UART, 2P BOOT. Public BMS designs show both a 2×5 1.27mm JTAG and a 2.54mm TTL UART. Users never see them; the lab and the programmer do. The mate is a pogo, an IDC pod or Dupont, so pins must be straight and plating must last.
Lab placement
| Port | Typical header | Note |
|---|---|---|
| SWD / Cortex Debug | 2×5P 1.27mm | Needs a true 1.27mm pod; a 2.54mm adapter stack gets tall |
| JTAG 14/20P | 2.54mm dual row | Enough grounds; keep fat power off RESET |
| UART 3P | 2.54mm single | Silkscreen GND/TX/RX to match the USB-TTL stick |
| BOOT / termination | 2.54mm + jumper | 0Ω in MP, cap on the debug spin |
Fixtures
- ICT/FCT: process headers or pads. If a header is the dock, gold for thousands of cycles; tin goes high-R.
- Board-to-board fixtures: dual-beam gold sockets as wear parts.
- Programming nests: equal pin length so the board does not tilt; locating holes beat an extra pin.
Keep after MP?
Consumer builds may leave pads only. Industrial and auto often keep the header for service flashing — gold, a window or a plug, away from HV.
Junjia supplies 2.54/1.27mm strips, sockets and jumpers. State cycle count for the programming dock so plating matches the line, not the cheapest sample.